The article titled, Hardware Acceleration of a CNN-based Automatic Modulation Classifier has been accepted for publication in the 2023 Southern Conference on Programmable Logic- SPL2023.

Sravanth Chebrolu, Srinivas Boppu and Linga Reddy Cenkeramaddi, “Hardware Acceleration of a CNN-based Automatic Modulation Classifier,” has been accepted for publication in the 2023 Southern Conference on Programmable Logic- SPL2023.

Abstract: Automatic modulation classification (AMC) has found its place in numerous applications, ranging from cognitive radio and adaptive communication to electronic reconnaissance and spectrum interference detection. Several attempts have been made to develop a high-accuracy modulation classifier using machine learning based convolutional neural networks (CNNs). This paper considers one such model, which uses a fixed boundary range empirical wavelet transform and deep CNN, and accelerates the model on the ZCU104 FPGA board to achieve fast classification times. The proposed accelerator can achieve a maximum classification accuracy of 96% for +8 dB signal-to-noise ratio (SNR) radio signals. Compared to similar works, the accelerator performs reasonably well for low SNR ratios (≤ +6 dB). Furthermore, the model is implemented on an edge CPU device (Raspberry Pi), and our accelerator is 50× faster than the CPU implementation. Our design achieves a reasonable throughput of 1.8K classifications/sec and a classification time of 550 µs per sample.

Keywords: Modulation Classification, Hardware Acceleration, Deep Learning, Convolutional Neural Networks, Vitis AI

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